1. Field of the Invention
The present invention relates to a method of driving a plasma display panel including discharge cells arranged in a matrix fashion.
2. Description of the Related Art
In recent years, a plasma display panel (referred to as “PDP”) in which a number of discharge cells are arranged in a matrix has been drawn attention as a two-dimensional image display panel. The PDP is directly driven by a digital image signal and the number of gradation levels (gradation sequence) of luminance (the number of luminance levels) expressable by the PDP is decided by the number of bits of an image data for each pixel included in the digital image signal. A sub field method is known as a gradation sequence display method for the PDP. The sub field method divides a display period of one field into a plurality of sub fields, and drives each cell for each sub field. One method for driving the PDP is disclosed in Japanese Patent Kokai No. 2001-312244.
In the sub field method, a display period of one field is divided into a plurality of sub fields. Each sub field includes an address period for setting each pixel in a lighting mode or a light extinguishing mode in accordance with the image data and a luminance maintaining period for only lighting a pixel in the lighting mode for a period corresponding to weighting of the sub field concerned. In other words, whether or not a discharge cell is illuminated within each sub field (address period) is decided, and only the discharge cell in the lighting mode is illuminated for a period (i.e., a luminance maintaining period) allocated to this sub field. Accordingly, one field may include one or more sub fields in a luminance state and one or more sub fields in a light extinguishment (nonluminance) state. Therefore, an intermediate luminance is created for that one field in accordance with a sum of the luminance periods of all the sub fields in that one field.
FIG. 1 of the accompanying drawings illustrates a typical example of a light emit driving format for the PDP. One field in an image signal is divided into twelve sub fields SF1 to SF12, so that driving of the PDP is executed for each sub field. Basically, each sub field includes an address stage Wc and a luminance maintaining stage Ic. The address stage Wc sets each discharge cell of the PDP in either a lighting mode (i.e., an operable mode) or a light extinguishing mode (i.e., a nonoperable mode) on the basis of the input image data. The luminance maintaining stage Ic illuminates only a discharge cell in the lighting mode for a period (number of times) in accordance with weighting of each sub field. It should be noted that an initial reset stage Rc is executed to initialize all discharge cells of the PDP to the lighting mode in only the first sub field SF1 at the front end (head) of the field, and a light elimination (extinction) stage E is executed in the last sub field SF12 at the rear end of the field.
FIG. 2 of the accompanying drawings shows relationship among pixel drive data GD obtained by applying a conversion process (will be described) to the pixel data, gradation levels (gradation sequence) corresponding to the pixel drive data GD, and a light emit driving pattern of the discharge cells in accordance with the pixel drive data GD. By sampling an image signal, for example, pixel data PD of 8 bits can be obtained. The pixel data PD then undergoes a multi-gradation process, so that multi-gradation image data PDS is generated, of which bit number is reduced to 4 bits, while maintaining the present number of gradation levels. The multi-gradation image data PDS is converted into the pixel driving data GD including first to twelfth bits in accordance with a conversion table shown in FIG. 2. Each of the first to twelfth bits corresponds to each of the sub fields SF1 to SF12.
FIG. 3 of the accompanying drawings illustrates application timing of various driving pulses to row electrodes and column electrodes of the PDP in accordance with the light emit driving format shown in FIG. 2. FIG. 3 shows a drive scheme by a selected light-extinction method (one reset-one selected light extinction address method).
First, in the initial reset stage RC of the sub field SF1, a reset pulse RPX having a negative polarity is applied to row electrodes X1 to Xn. In parallel with application of such a reset pulse RPX, a reset pulse RPY having a positive polarity is applied to row electrodes Y1 to Y2. As a result of application of the reset pulses RPx and RPY, all discharge cells of the PDP are reset-discharged, so that wall electric charge of a certain amount is equally formed within each discharge cell. All the discharge cells are therefore initialized into the lighting mode (illumination mode).
Next, at the address stage Wc of each sub field, a pixel data pulse DP having a voltage corresponding to a logical level of a pixel driving data bit DB (DB1 to DB12) is generated. The pixel driving data bits DB1 to DB12 correspond to the first to twelfth bits of the pixel driving data GD. For example, at the address stage WC of the sub field SF1, a part corresponding to a first row within the pixel driving data bit DB1 is picked out and a pixel data pulse group DP11 including m pixel data pulses corresponding to the logical levels of the picked up part is applied to column electrodes D1 to Dm. By executing the same operation on and after the second row of the pixel driving data bit DB1, a pixel data pulse group DP1i (DP11 to DP1n) for each row is sequentially applied to column electrodes D1 to Dm in the address stage Wc of the sub field SF1.
Also in the address stage Wc, a scan pulse SP with a negative polarity is sequentially applied to row electrodes Y1 to Yn at the same timing as each application timing of the pixel data pulse DP. In this case, discharge (selected light-extinction discharge) occurs only in a discharge cell at a crossing of the row electrode to which the scan pulse SP is applied and the column electrode to which the high voltage pixel data pulse is applied, and then the wall electric charge remaining in this discharge cell is eliminated.
According to such selected light-extinction discharge, the discharge cell that is initialized in the lighting mode at the reset stage RC shifts to the light extinguishing mode. On the other hand, the discharge cell, in which the above described selected light-extinction discharge does not occur, maintains a condition that it is initialized in the reset stage Rc, namely, the lighting mode.
Next, at the luminance maintaining stage Ic of each sub field, as shown in FIG. 3, a maintaining pulse IP (IPX and IPY) with a positive polarity is alternately applied to row electrodes Xi (X1 to Xn) and row electrodes Yi (Y1 to Yn). At the luminance maintaining stage Ic, the maintaining pulse IP is applied so that the numbers of the maintaining pulse IP applied to the sub fields SF1 to SF12 have a predetermined ratio. For example, in the case shown in FIG. 3, the ratio of the application numbers of the maintaining pulse IP for the sub fields are as follows;
SF1:SF2:SF3 . . . =2:4:6: . . .
A discharge cell in which the wall electric charge is remaining, namely, the discharge cell set in the lighting mode at the address stage Wc only performs the maintaining-discharge upon every application of the maintaining pulses IPX and IPY. Accordingly, the discharge cell set in the lighting mode maintains the light emitting condition (emission maintaining-discharge) for a period corresponding to the numbers of the discharging, which is allocated to each sub field as described above.
Then, only in the sub field SF12 at the rear end of the field, a light extinction stage E is executed. At this light extinction stage E, a light extinction pulse AP with a positive polarity (not illustrated) is generated and this light extinction pulse AP is applied to the column electrodes D1 to Dm. In parallel with the application of the light extinction pulse AP, another light extinction pulse EP with a negative polarity is generated and is applied to each of the row electrodes Y1 to Yn. The simultaneous application of the light extinction pulses AP and EP causes the light extinction discharge within all the discharge cells in the PDP, so that the wall electric charges remaining in all the discharge cells are eliminated. As a result of such light extinction discharge, all the discharge cells in the PDP are set in the light extinction mode.
In the above described driving method, only a discharge cell in the light emitting state in the immediately preceding sub field is selectively eliminated and discharged at a selected light extinction address stage of the subject sub field only. Thus, the N (e.g., twelve) sub fields are sequentially lighted from the front (head) sub field, so that N+1 (thirteen) gradation sequence display is created. By summing up the numbers of the illumination of the maintaining-discharge in each sub field, the gradation sequence display is created in accordance with the input image signal.
Since a visual property of a human being has a logarithmic property, human's eyes are sensitive to variation in the gradation sequence (sequence of gradation levels) in a low luminance area. In the above described driving method, the number of the maintaining light emissions (i.e., the number of the maintaining pulses) in the sub field SF1 used for the lowest gradation level should be at least twice because the negative wall electric charge is needed to be formed on a row electrode Y, to which the scan pulse SP is applied at the selected light extinction address in the next sub field. Accordingly, a finer gradation sequence display is difficult. For example, it is impossible to reduce to the number of the maintaining light emissions to once.